ENHANCING TESTABILITY OF LARGE-SCALE INTEGRATED-CIRCUITS VIA TEST POINTS AND ADDITIONAL LOGIC

被引：122

作者：

WILLIAMS, MJ ^{[1
]}

ANGELL, JB ^{[1
]}

机构：

[1] STANFORD UNIV, DEPT ELECT ENGN, STANFORD, CA 94305 USA

来源：

IEEE TRANSACTIONS ON COMPUTERS | 1973年 / C 22卷 / 01期

关键词：

D O I：

10.1109/T-C.1973.223600

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

引用

页码：46 / 60

页数：15

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