OPTIMIZATION OF GAAS-MESFET LOGIC GATES WITH SUB-NANOSECOND PROPAGATION DELAYS

This paper describes the optimization of logic gates using GaAs MESFET's. Nonlinear stored charges are evaluated, and propagation delays and power dissipations are computed for logic gates with and without load driver. The performances of these two circuit alternatives are compared, and parameter values are optimized to provide a minimum propagation delay for a given power allocation. Copyright © 1979 by The Institute of Electrical and Electronics Engineers, Inc.