SELF-ALIGNED COMPLEMENTARY BIPOLAR-TRANSISTORS FABRICATED WITH A SELECTIVE-OXIDATION MASK

[1] COMPUTATION OF INTEGRATED-CIRCUIT YIELDS FROM DISTRIBUTION OF SLICE YIELDS FOR INDIVIDUAL DEVICES [J]. IEEE TRANSACTIONS ON ELECTRON DEVICES, 1968, ED15 (06) : 405 - &

[2] COMPARISON OF EXPERIMENTAL AND THEORETICAL RESULTS ON POLYSILICON EMITTER BIPOLAR-TRANSISTORS [J]. IEEE TRANSACTIONS ON ELECTRON DEVICES, 1984, 31 (07) : 853 - 860

[3] BRICE DK, 1971, 1ST P INT C ION IMPL, P101

[4] EFFECTS OF DISLOCATIONS IN SILICON TRANSISTORS WITH IMPLANTED EMITTERS [J]. SOLID-STATE ELECTRONICS, 1979, 22 (01) : 95 - 104

[5] SELF-ALIGNED TRANSISTORS WITH POLYSILICON EMITTERS FOR BIPOLAR VLSI [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1985, 20 (01) : 162 - 167

[6] A MONOLITHIC 8-BIT A/D CONVERTER WITH 120 MHZ CONVERSION RATE [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1984, 19 (06) : 837 - 841

[7] DISLOCATION GENERATION AT SI3N4 FILM EDGES ON SILICON SUBSTRATES AND VISCOELASTIC BEHAVIOR OF SIO2-FILMS [J]. JOURNAL OF THE ELECTROCHEMICAL SOCIETY, 1979, 126 (06) : 1014 - 1019

[8] VERTICAL P-N-P FOR COMPLEMENTARY BIPOLAR TECHNOLOGY [J]. IEEE TRANSACTIONS ON ELECTRON DEVICES, 1980, 27 (08) : 1394 - 1396

[9] Nakamura T., 1982, International Electron Devices Meeting. Technical Digest, P684

[10] SELF-ALIGNED BIPOLAR-TRANSISTORS FOR HIGH-PERFORMANCE AND LOW-POWER-DELAY VLSI [J]. IEEE TRANSACTIONS ON ELECTRON DEVICES, 1981, 28 (09) : 1010 - 1013

[1] COMPUTATION OF INTEGRATED-CIRCUIT YIELDS FROM DISTRIBUTION OF SLICE YIELDS FOR INDIVIDUAL DEVICES [J]. IEEE TRANSACTIONS ON ELECTRON DEVICES, 1968, ED15 (06) : 405 - &

[2] COMPARISON OF EXPERIMENTAL AND THEORETICAL RESULTS ON POLYSILICON EMITTER BIPOLAR-TRANSISTORS [J]. IEEE TRANSACTIONS ON ELECTRON DEVICES, 1984, 31 (07) : 853 - 860

[3] BRICE DK, 1971, 1ST P INT C ION IMPL, P101

[4] EFFECTS OF DISLOCATIONS IN SILICON TRANSISTORS WITH IMPLANTED EMITTERS [J]. SOLID-STATE ELECTRONICS, 1979, 22 (01) : 95 - 104

[5] SELF-ALIGNED TRANSISTORS WITH POLYSILICON EMITTERS FOR BIPOLAR VLSI [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1985, 20 (01) : 162 - 167

[6] A MONOLITHIC 8-BIT A/D CONVERTER WITH 120 MHZ CONVERSION RATE [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1984, 19 (06) : 837 - 841

[7] DISLOCATION GENERATION AT SI3N4 FILM EDGES ON SILICON SUBSTRATES AND VISCOELASTIC BEHAVIOR OF SIO2-FILMS [J]. JOURNAL OF THE ELECTROCHEMICAL SOCIETY, 1979, 126 (06) : 1014 - 1019

[8] VERTICAL P-N-P FOR COMPLEMENTARY BIPOLAR TECHNOLOGY [J]. IEEE TRANSACTIONS ON ELECTRON DEVICES, 1980, 27 (08) : 1394 - 1396

[9] Nakamura T., 1982, International Electron Devices Meeting. Technical Digest, P684

[10] SELF-ALIGNED BIPOLAR-TRANSISTORS FOR HIGH-PERFORMANCE AND LOW-POWER-DELAY VLSI [J]. IEEE TRANSACTIONS ON ELECTRON DEVICES, 1981, 28 (09) : 1010 - 1013