DLTS ANALYSIS OF CARRIER GENERATION TRANSIENTS IN THIN SOI MOSFETS

A method for the invectigation of carrier generation in thin SOI MOSFET’s is presented. In this method, a depletion-mode transistor is pulsed to deep depletion, and the resulting drain currents are analyzed using a boxcar DLTS system. The preset rate window is a measure of the channel formation time at the DLTS peak temperature, and the activation energy of the relevant Arrhenius plot is used to identify the dominant generation mechanism for various temperature ranges. If generation via deep centers in the depletion region dominates, the generation lifetime can also be measured in a particularly simple manner using “small pulse” excitation. For the ZMR-SOI material used in this work, it was found that for temperatures up to 440 K, the dominant mechanism was generation via deep centers in the depletion region. The generation lifetime was of the order of microseconds and varied with temperature in accordance with the assumption of a single activation energy exponential model of the generation rate. © 1990 IEEE