Low-voltage CMOS frequency synthesizer for ERMES pager application

被引：2

作者：

Hsu, JM ^{[1
]}

Dehng, GK

Yang, CY

Liu, SI

机构：

[1] Ind Technol Res Inst, Hsinchu 300, Taiwan

[2] Natl Taiwan Univ, Dept Elect Engn, Taipei 10617, Taiwan

[3] Huafan Univ, Taipei 10617, Taiwan

[4] Realtek Inc, Hsinchu 300, Taiwan

来源：

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-ANALOG AND DIGITAL SIGNAL PROCESSING | 2001年 / 48卷 / 09期

关键词：

D O I：

10.1109/82.964995

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A low-voltage frequency synthesizer fabricated With a 0.35-mum standard CMOS technology is presented. A1-V dual-modulus prescaler using the dynamic back-gate forward bias method has been developed for low-voltage operation. The prescaler, including a preamplifier, measured at 1-V supply voltage has a maximum operating frequency of 170 MHz, and its power dissipation is only 0.9 mW. The voltage-controlled oscillator (VCO) in the frequency synthesizer is an LC-tank based oscillator. When locked at the oscillation frequency of 148 MHz, the measured phase noise of the VCO is - 106 dBc/Hz at 100-kHz from the carrier. The whole power consumption of the frequency synthesizer is 10.5 mW.

引用

页码：826 / 834

页数：9

共 15 条

[1]

[Anonymous], 1984, PHASE LOCKED LOOPS T

[2] A 1.2 GHz CMOS dual-modulus prescaler using new dynamic D-type flip-flops [J].