A physical alpha-power law MOSFET model

被引：79

作者：

Bowman, KA ^{[1
]}

Austin, BL

Eble, JC

Tang, XH

Meindl, JD

机构：

[1] Georgia Inst Technol, Atlanta, GA 30332 USA

[2] Compaq Corp, Shrewsbury, MA 01545 USA

来源：

IEEE JOURNAL OF SOLID-STATE CIRCUITS | 1999年 / 34卷 / 10期

关键词：

alpha-power law; circuit design; CMOS; gigascale integration; physics-based model; technology projections;

D O I：

10.1109/4.792617

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A new compact physics-based alpha-power law MOSFET model is introduced to enable projections of low power circuit performance for future generations of technology by linking the simple mathematical expressions of the original alpha-power law model with their physical origins. The new model, verified by HSPICE simulations and measured data, includes: 1) a subthreshold region of operation for evaluating the on/off current tradeoff that becomes a dominant low power design issue as technology scales, 2) the effects of vertical and lateral high field mobility degradation and velocity saturation, and 3) threshold voltage roll-off. Model projections for MOSFET CV/I indicate a 2X-performance opportunity compared to the National Technology Roadmap for Semiconductors (NTRS) extrapolations for the 250, 180, and 150 nm generations subject to maximum leakage current estimates of the roadmap, NTRS and model calculations converge at the 70 nm technology generation, which exhibits pronounced on/off current interdependence for low power gigascale integration.

引用

页码：1410 / 1414

页数：5

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