Nonvolatile memory operations of metal-ferroelectric-insulator-semiconductor (MFIS) FET's using PLZT/STO/Si(100) structures

被引：137

作者：

Tokumitsu, E

Nakamura, R

Ishiwara, H

机构：

[1] Precision and Intelligence Lab., Tokyo Institute of Technology

来源：

IEEE ELECTRON DEVICE LETTERS | 1997年 / 18卷 / 04期

关键词：

D O I：

10.1109/55.563315

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

We report fabrication and characterization of p-channel metal-ferroelectric-insulator-semiconductor (MFIS-)FET's using the PLZT/STO/Si(100) structures and demonstrate nonvolatile memory operations of the MFISFET's. It is found that I-D-V-G characteristics of PLZT/STO/Si MFIS-FET's show a hysteresis loop due to the ferroelectric nature of the PLZT film. It is also demonstrated that the I-D can be controlled by the ''write'' pulse, which was applied before the measurements, even at the same ''read'' gate voltage.

引用

页码：160 / 162

页数：3

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