共 10 条
[1]
Analytic models for crosstalk delay and pulse analysis under non-ideal inputs
[J].
ITC - INTERNATIONAL TEST CONFERENCE 1997, PROCEEDINGS: INTEGRATING MILITARY AND COMMERCIAL COMMUNICATIONS FOR THE NEXT CENTURY,
1997,
:809-818
[2]
Test generation in VLSI circuits for crosstalk noise
[J].
INTERNATIONAL TEST CONFERENCE 1998, PROCEEDINGS,
1998,
:641-650
[3]
MODELING AND SIMULATION OF INTERCONNECTION DELAYS AND CROSSTALKS IN HIGH-SPEED INTEGRATED-CIRCUITS
[J].
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS,
1990, 37 (01)
:1-9
[4]
MALY W, 1996, P IEEE EUR DES TEST, P19
[6]
On-line detection of logic errors due to crosstalk, delay, and transient faults
[J].
INTERNATIONAL TEST CONFERENCE 1998, PROCEEDINGS,
1998,
:524-533
[7]
On-line testing for VLSI - A compendium of approaches
[J].
JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS,
1998, 12 (1-2)
:7-20
[10]
ZAIN A, 1992, P IEEE INT C COMP AI, P444