Fabrication of silicon nanowire structures based on proximity effects of electron-beam lithography

被引：11

作者：

Hu, SF

Weng, WC

Wan, YM

机构：

[1] Natl Nano Device Labs, Hsinchu 300, Taiwan

[2] I Shou Univ, Dept Elect Engn, Kaohsiung 840, Taiwan

来源：

SOLID STATE COMMUNICATIONS | 2004年 / 130卷 / 1-2期

关键词：

nanostructures; nanofabrications;

D O I：

10.1016/j.ssc.2004.01.015

中图分类号：

O469 [凝聚态物理学];

学科分类号：

070205 ;

摘要：

One-dimensional silicon nanowire structures have been successfully made by using the proximity and accumulation effects of electron-beam (e-beam) lithography. Wire structures are fabricated in a thin poly silicon layer on a silicon substrate with a 400 nm buried SiO2 Measurements of the current-voltage characteristics at various temperatures from 35 to 200 K show significant non-linearities and conductance peaks indicating the existence of single-electron behavior. The blockade size is significantly affected by thermal effects, oscillations of the blockade, and the conductivity dependence on the gate potential. (C) 2004 Elsevier Ltd. All rights reserved.

引用

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页码：111 / 114

页数：4

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共 10 条

[1] Single-electron charging in nanocrystalline silicon point-contacts [J].

Durrani, ZAK ;

Kamiya, T ;

Tan, YT ;

Ahmed, H ;

Lloyd, N .

MICROELECTRONIC ENGINEERING, 2002, 63 (1-3) :267-275

[2] A high-speed silicon-based few-electron memory with metal-oxide-semiconductor field-effect transistor gain element [J].

Irvine, AC ;

Durrani, ZAK ;

Ahmed, H .

JOURNAL OF APPLIED PHYSICS, 2000, 87 (12) :8594-8603

[3] Coulomb blockade oscillations at room temperature in a Si quantum wire metal-oxide-semiconductor field-effect transistor fabricated by anisotropic etching on a silicon-on-insulator substrate [J].

Ishikuro, H ;

Fujii, T ;

Saraya, T ;

Hashiguchi, G ;

Hiramoto, T ;

Ikoma, T .

APPLIED PHYSICS LETTERS, 1996, 68 (25) :3585-3587

[4] Quantum mechanical effects in the silicon quantum dot in a single-electron transistor [J].

Ishikuro, H ;

Hiramoto, T .

APPLIED PHYSICS LETTERS, 1997, 71 (25) :3691-3693

[5] Simple fabrication scheme for sub-10 nm electrode gaps using electron-beam lithography [J].

Liu, K ;

Avouris, P ;

Bucchignano, J ;

Martel, R ;

Sun, S ;

Michl, J .

APPLIED PHYSICS LETTERS, 2002, 80 (05) :865-867

[6] Room temperature operation of Si single-electron memory with self-aligned floating dot gate [J].

Nakajima, A ;

Futatsugi, T ;

Kosemura, K ;

Fukano, T ;

Yokoyama, N .

APPLIED PHYSICS LETTERS, 1997, 70 (13) :1742-1744

[7] Si complementary single-electron inverter with voltage gain [J].

Ono, Y ;

Takahashi, Y ;

Yamazaki, K ;

Nagase, M ;

Namatsu, H ;

Kurihara, K ;

Murase, K .

APPLIED PHYSICS LETTERS, 2000, 76 (21) :3121-3123

[8] Logic circuit elements using single-electron tunnelling transistors [J].

Stone, NJ ;

Ahmed, H .

ELECTRONICS LETTERS, 1999, 35 (21) :1883-1884

[9] Control of Coulomb blockade oscillations in silicon single electron transistors using silicon nanocrystal floating gates [J].

Takahashi, N ;

Ishikuro, H ;

Hiramoto, T .

APPLIED PHYSICS LETTERS, 2000, 76 (02) :209-211

[10] Silicon single-electron quantum-dot transistor switch operating at room temperature [J].

Zhuang, L ;

Guo, LJ ;

Chou, SY .

APPLIED PHYSICS LETTERS, 1998, 72 (10) :1205-1207