Characterisation of sub-100 nm-MOS-transistors processed by optical lithography and a sidewall-etchback technique

被引：8

作者：

Horstmann, JT

Hilleringmann, U

Goser, K

机构：

[1] Faculty of Electrical Engineering, University of Dortmund, D 44221 Dortmund

来源：

MICROELECTRONIC ENGINEERING | 1996年 / 30卷 / 1-4期

关键词：

Characterization - Computer simulation - Electrodes - Gates (transistor) - Geometrical optics - Masks - Optimization - Photolithography - Reactive ion etching - Semiconducting films - Semiconductor device manufacture - Semiconductor device models;

D O I：

10.1016/0167-9317(95)00280-4

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper describes the fabrication of NMOS-transistors with a geometric gate length of down to 50 nm using conventional optical lithography and a modified sidewall-etchback process. Based on measurements the transistors are characterised and their device parameters are compared to simulations. Finally the procedures for further optimisation of the process will be explained.

引用

页码：431 / 434

页数：4

共 5 条

[1]

DAVID SY, 1992, J VAC SCI TECHNOL B, V10, P2251

[2] GENERATION OF LESS-THAN-50 NM PERIOD GRATINGS USING EDGE DEFINED TECHNIQUES [J].