A heavy ion implanted pocket 0.10 mu m n-type metal-oxide-semiconductor field effect transistor with hybrid lithography (electron-beam/deep ultraviolet) and specific gate passivation process
被引:4
作者:
Benistant, F
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机构:LETI (CEA), 38054 Grenoble Cedex 9, 17, rue des Martyrs
Benistant, F
Tedesco, S
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机构:LETI (CEA), 38054 Grenoble Cedex 9, 17, rue des Martyrs
Tedesco, S
Guegan, G
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机构:LETI (CEA), 38054 Grenoble Cedex 9, 17, rue des Martyrs
Guegan, G
Martin, F
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机构:LETI (CEA), 38054 Grenoble Cedex 9, 17, rue des Martyrs
Martin, F
Heitzmann, M
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机构:LETI (CEA), 38054 Grenoble Cedex 9, 17, rue des Martyrs
Heitzmann, M
Dalzotto, B
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机构:LETI (CEA), 38054 Grenoble Cedex 9, 17, rue des Martyrs
Dalzotto, B
机构:
[1] LETI (CEA), 38054 Grenoble Cedex 9, 17, rue des Martyrs
来源:
JOURNAL OF VACUUM SCIENCE & TECHNOLOGY B
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1996年
/
14卷
/
06期
关键词:
D O I:
10.1116/1.588642
中图分类号:
TM [电工技术];
TN [电子技术、通信技术];
学科分类号:
0808 ;
0809 ;
摘要:
We present a 0.10 mu m n-type metal-oxide-semiconductor process to achieve devices with reduced short channel effect (SCE) and good current drive capability. Full compatible chemical amplified resist process between deep ultraviolet and electron-beam Lithography allowed us to Use hybrid lithography at gate level. For the first time, we show that the conventional gate reoxidation is a Limiting step to process integration because of the bird's beak formation at the poly-gate edge. Consequently, this process is replaced by a low thermal oxide deposition. In addition, indium and gallium pocket implantations have been realized to improve the SCE control. (C) 1996 American Vacuum Society.