Integrated CoolMOS FET/SiC-diode module for high performance power switching

被引：36

作者：

Liang, ZX ^{[1
]}

Lu, B ^{[1
]}

van Wyk, JD ^{[1
]}

Lee, FC ^{[1
]}

机构：

[1] Virginia Polytech Inst & State Univ, Ctr Power Elect Syst, Blacksburg, VA 24061 USA

来源：

IEEE TRANSACTIONS ON POWER ELECTRONICS | 2005年 / 20卷 / 03期

基金：

美国国家科学基金会; 欧洲研究理事会;

关键词：

power electronics module integration; power semiconductor switching; structural electromagnetic parameters;

D O I：

10.1109/TPEL.2005.846547

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A Si CoolMOS field effect transistor and SiC diode assembly with gate driver in boost configuration (ratings at 600 V/12 A), for power factor correction application, has been fabricated in a version of an integrated power electronic module. It uses the so-called embedded power technology, to form a three-dimensional multiple chip/component interconnection with the embedded chips in a co-planar ceramic substrate with thin-film metallization bond/interconnection added on top. In this paper, the switching parameters of this module and their effects on the performance of a converter have been analyzed and experimentally characterized. The procedures adopted for the defined fabrication process of planar metallization interconnects are presented. In addition to the improvement of structural electrical properties, compared to a conventional discrete version, the characteristics of the planar process integration have also been demonstrated.

引用

页码：679 / 686

页数：8

共 11 条

[1]

[Anonymous], 2003, Applied Power Electronics Conference and Exposition

[2] Modeling of the CoolMOS™ transistor -: Part II:: DC model and parameter extraction [J].

Daniel, BJ ;

Parikh, CD ;

Patil, MB .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 2002, 49 (05) :923-929

[3]

LIANG ZX, 2000, INT J MICROCIRCUIT E, V23, P481

[4]

Lorenz L, 2002, PCC-OSAKA 2002: PROCEEDINGS OF THE POWER CONVERSION CONFERENCE-OSAKA 2002, VOLS I - III, P232, DOI 10.1109/PCC.2002.998553

[5]

Lorenz L, 2001, IEEE IND APPLIC SOC, P376, DOI 10.1109/IAS.2001.955448

[6]

Lu B, 2004, APPL POWER ELECT CO, P1200

[7]

MENG Y, 2003, P CPES POW EL SEM BL, P255

[8]

PANG Y, 2002, P IMECE 02 ASME INT

[9] Influence of device and circuit parameters on the switching losses of an ultra fast CoolMOS/SiC-diode device-set: Simulation and measurement [J].

Petzoldt, J ;

Reimann, T ;

Lorenz, L ;

Zverev, I .

ISPSD'01: PROCEEDINGS OF THE 13TH INTERNATIONAL SYMPOSIUM ON POWER SEMICONDUCTOR DEVICES & ICS, 2001, :187-190

[10] Parasitic extraction methodology for insulated gate bipolar transistors [J].

Trivedi, M ;

Shenai, K .

IEEE TRANSACTIONS ON POWER ELECTRONICS, 2000, 15 (04) :799-804

← 1 2 →