A process integration of high-performance 64-kb MRAM

被引：14

作者：

Kim, HJ ^{[1
]}

Jeong, WC ^{[1
]}

Koh, KH ^{[1
]}

Jeong, GT ^{[1
]}

Park, JH ^{[1
]}

Lee, SY ^{[1
]}

Oh, JH ^{[1
]}

Song, IH ^{[1
]}

Jeong, HS ^{[1
]}

Kim, K ^{[1
]}

机构：

[1] Samsung Elect Co Ltd, Semicond R&D Ctr, Adv Technol Dev Team, Yongin 449711, Gyeonggi Do, South Korea

来源：

IEEE TRANSACTIONS ON MAGNETICS | 2003年 / 39卷 / 05期

关键词：

magnetic tunnel junction (MTJ); magnetoresistive random access memory (MRAM); process integration; shorting failure;

D O I：

10.1109/TMAG.2003.816243

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

We have demonstrated fully integrated 64-kb magnetoresistive random access memory (MRAM) using 0.24-mum CMOS technology and discussed some key issues in process integration. Optimal tunneling magnetoresistive (TMR) properties of MRAM bits (37% of TMR ratio and 5-10 kOmega.mum(2) of RA) were obtained mainly by the control of bottom electrode roughness, and electrical shorting was avoided by some commercialized wet solutions. In viewpoint of process integration, excellent TMR properties of magnetic tunnel junction (MTJ) fresh films and prevention of their degradation in post patterning process are two crucial factors, and especially, electrical shorting requires some careful control.

引用

页码：2851 / 2853

页数：3

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