DC-DC converter-aware power management for low-power embedded systems

被引:72
作者
Choi, Yongseok [1 ]
Chang, Naehyuck
Kim, Taewhan
机构
[1] Seoul Natl Univ, Sch Engn & Comp Sci, Seoul 151742, South Korea
[2] Seoul Natl Univ, Sch Elect Engn & Comp Sci, Seoul 151742, South Korea
关键词
DC-DC converter; low power; voltage scaling;
D O I
10.1109/TCAD.2007.890837
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Most digital systems are equipped with dc-dc converters to supply various levels of voltages from batteries to logic devices. DC-DC converters maintain legal voltage ranges regardless of the load current variation as well as battery voltage drop. Although the efficiency of dc-dc converters is changed by the output voltage level and the load current, most existing power management techniques simply ignore the efficiency variation of dc-dc converters. However, without a careful consideration of the efficiency variation of dc-dc converters, finding a true optimal power management will be impossible. In this paper, we solve the problem of energy minimization with the consideration of the characteristics of power consumption of dc-dc converters. Specifically, the contributions of our work are as follows: 1) We analyze the effects of the efficiency variation of dc-dc converters on a single-task execution in dynamic voltage scaling (DVS) scheme and propose the DC_DVS technique for dc-dc converter-aware energy-minimal DVS. 2) DC_DVS is then extended to embed an awareness of the characteristics of dc-dc converters in general DVS techniques for multiple tasks. 3) We go on to propose a technique called DC-CONF for generating a dc-dc converter that is most energy efficient for a particular application. 4) We also present an integrated framework, i.e., DC-lp, based on DC_DVS and DC-CONF, which addresses dc-dc converter configuration and DVS simultaneously. Experimental results show that DC-lp is able to save up to 24.8% of energy compared with previous power management schemes, which do not consider the efficiency variation of dc-de converters.
引用
收藏
页码:1367 / 1381
页数:15
相关论文
共 27 条
[1]  
AYDIN H, 2001, P IEEE REAL TIM SYST, P89
[2]   An energy efficient Rate Selection Algorithm for voltage quantized dynamic voltage scaling [J].
Chandrasena, LH ;
Chandrasena, P ;
Liebelt, NJ .
ISSS'01: 14TH INTERNATIONAL SYMPOSIUM ON SYSTEM SYNTHESIS, 2001, :124-129
[3]  
Chen W, 1997, APPL POWER ELECT CO, P911, DOI 10.1109/APEC.1997.575753
[4]   DC-DC converter-aware power management for battery-operated embedded systems [J].
Choi, Y ;
Chang, N ;
Kim, T .
42nd Design Automation Conference, Proceedings 2005, 2005, :895-900
[5]   Hard real-time scheduling for low-energy using stochastic data and DVS processors [J].
Gruian, F .
ISLPED'01: PROCEEDINGS OF THE 2001 INTERNATIONAL SYMPOSIUM ON LOWPOWER ELECTRONICS AND DESIGN, 2001, :46-51
[6]   EVALUATION OF SYNCHRONOUS-RECTIFICATION EFFICIENCY IMPROVEMENT LIMITS IN FORWARD CONVERTERS [J].
JOVANOVIC, MM ;
ZHANG, MT ;
LEE, FC .
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, 1995, 42 (04) :387-395
[7]  
Kim NY, 1996, REAL TIM SYST SYMP P, P300, DOI 10.1109/REAL.1996.563726
[8]   Performance comparison of dynamic voltage scaling algorithms for hard real-time systems [J].
Kim, W ;
Shin, D ;
Yun, HS ;
Kim, J ;
Min, SL .
EIGHTH IEEE REAL-TIME AND EMBEDDED TECHNOLOGY AND APPLICATIONS SYMPOSIUM, PROCEEDINGS, 2002, :219-228
[9]  
Kim WS, 2002, DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION, 2002 PROCEEDINGS, P788
[10]   Monolithic DC-DC converter analysis and mosfet gate voltage optimization [J].
Kursun, V ;
Narendra, SG ;
De, VK ;
Friedman, EG .
4TH INTERNATIONAL SYMPOSIUM ON QUALITY ELECTRONIC DESIGN, PROCEEDINGS, 2003, :279-284