Ta2O5/Silicon barrier height measured from MOSFETs fabricated with Ta2O5 gate dielectric

被引：11

作者：

Lai, BC ^{[1
]}

Yu, JC

Lee, JYM

机构：

[1] Natl Tsing Hua Univ, Dept Elect Engn, Hsinchu 300, Taiwan

[2] Natl Tsing Hua Univ, Inst Elect Engn, Hsinchu 300, Taiwan

来源：

IEEE ELECTRON DEVICE LETTERS | 2001年 / 22卷 / 05期

关键词：

barrier height; hot carrier effects; MOSFET gate dielectric; thermionic emission;

D O I：

10.1109/55.919235

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

N-channel metal oxide semiconductor held effect transistors with Ta2O5 gate dielectric mere fabricated. The Ta2O5/silicon barrier height was calculated using both the lucky electron model acid the thermionic emission model. Based on the lucky electron model, a barrier height of 0.77 eV was extracted from the slope of the ln(I-g/I-d) versus ln(I-sub/I-d) plot using an impact ionization energy of 1.3 eV, Due to the low barrier height, the application of Ta2O5 gate dielectric transistors is limited to low supply voltage preferably less than 2.0 V.

引用

页码：221 / 223

页数：3

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