Improvement of hot carrier reliability with deuterium anneals for manufacturing multilevel metal/dielectric MOS systems

被引:21
作者
Kizilyalli, IC [1 ]
Abeln, GC
Chen, Z
Lee, J
Weber, G
Kotzias, B
Chetlur, S
Lyding, JW
Hess, K
机构
[1] AT&T Bell Labs, Lucent Technol, Orlando, FL 32819 USA
[2] Univ Illinois, Beckman Inst, Urbana, IL 61801 USA
[3] AT&T Bell Labs, Lucent Technol, Murray Hill, NJ 07974 USA
关键词
D O I
10.1109/55.728907
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper discusses new experimental findings critical for process integration of deuterium post-metal anneals to improve channel hot carrier reliability in manufacturing multilevel metal CMOS integrated circuits. Detailed account of the deuterium process optimization experiments varying temperature, time, and ambient is given, Specifically, the first demonstration of the large hydrogen/deuterium isotope effect for multilevel metal/dielectric MOS systems is reported. Previous accounts of the isotope effect had been limited to CMOS structures with one-level of dielectric/metal and to about a 10 fold improvement in reliability. Deuterium, instead of hydrogen is introduced via an optimized post-metal anneal process to achieve a 50-100 fold improvement in transistor channel hot carrier lifetime. The benefits of the deuterium anneal are still observed even if the post-metal anneal is followed by the final SIN cap wafer passivation process. It is concluded that the deuterium post-metal anneal process is suitable for manufacturing high performance CMOS products and fully compatible with traditional integrated circuit processes.
引用
收藏
页码:444 / 446
页数:3
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