Threshold voltage of Si single-electron transistor

被引：18

作者：

Fujiwara, A ^{[1
]}

Horiguchi, S ^{[1
]}

Nagase, M ^{[1
]}

Takahashi, Y ^{[1
]}

机构：

[1] NTT Corp, NTT Basic Res Labs, Atsugi, Kanagawa 2430198, Japan

来源：

JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS BRIEF COMMUNICATIONS & REVIEW PAPERS | 2003年 / 42卷 / 4B期

关键词：

silicon; single-electron transistor (SET); threshold voltage; offset charge; background charge; pattern-dependent oxidation; strain;

D O I：

10.1143/JJAP.42.2429

中图分类号：

O59 [应用物理学];

学科分类号：

摘要：

We experimentally evaluate threshold voltages of Si single-electron transistors (SET) in order to investigate the effect of offset charges. Threshold voltages show a clear relation to the gate capacitance of SETS, which is a device parameter reflecting the size of the Si island of SETS. This indicates that the fabricated Si SETS do not suffer much from random offset charges that cause the threshold voltages to fluctuate. Moreover, our theoretical analysis shows that the obtained negative threshold voltages strongly suggest the reduction of the band gap of Si islands due to oxidation-induced strain.

引用

页码：2429 / 2433

页数：5

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