Fabrication of ultrashort T gates using a PMMA/LOR/UVIII resist stack

被引：20

作者：

Chen, Y ^{[1
]}

Macintyre, DS ^{[1
]}

Cao, X ^{[1
]}

Boyd, E ^{[1
]}

Moran, D ^{[1
]}

McLelland, H ^{[1
]}

Holland, M ^{[1
]}

Stanley, CR ^{[1
]}

Thayne, I ^{[1
]}

Thoms, S ^{[1
]}

机构：

[1] Univ Glasgow, Dept Elect & Elect Engn, Nanoelectr Res Ctr, Glasgow G12 8LT, Lanark, Scotland

来源：

JOURNAL OF VACUUM SCIENCE & TECHNOLOGY B | 2003年 / 21卷 / 06期

关键词：

D O I：

10.1116/1.1629292

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In this article, we report a procedure for the fabrication of ultrashort T gates using high resolution electron beam lithography and a PMMA/LOR/UVIII resist stack. The intermediate lift-off resist (LOR) layer improves the quality of gate lithography, and consequently, device yields. It is unaffected by wet chemical gate recessing procedures and we report the application of the procedure to the fabrication of pseudomorphic and metamorphic high electron mobility transistors (pHEMTs) with 50 nm T gates. Fabricated pHEMTs had a g(m) of 600 mS/mm, and f(t) of 200 GHz. Metamorphic HEMTs had a g(m) of 1500 mS/mm and f(t) of 350 GHz. We believe these are the fastest transistors of their kind in the world. (C) 2003 American Vacuum Society.

引用

页码：3012 / 3016

页数：5

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