Negative bias temperature instability mechanisms in p-channel power VDMOSFETs

被引：48

作者：

Stojadinovic, N

Dankovic, D

Djoric-Veljkovic, S

Davidovic, V

Manic, I

Golubovic, S

机构：

[1] Univ Nis, Fac Elect Engn, Nish 18000, Serbia Monteneg

[2] Univ Nis, Fac Civil Engn & Architecture, Nish 18000, Serbia Monteneg

来源：

MICROELECTRONICS RELIABILITY | 2005年 / 45卷 / 9-11期

关键词：

D O I：

10.1016/j.microrel.2005.07.018

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The negative bias temperature stress induced instabilities of threshold voltage in commercial p-channel power VDMOSFETs have been investigated. The threshold voltage shifts, which are more pronounced at higher voltages and/or temperatures, are caused by the NBT stress induced buildup of both oxide trapped charge and interface traps. However, the observed power low time dependencies of threshold voltage shifts are found to be affected mostly by the oxide trapped charge. The results are analysed in terms of the mechanisms responsible for buildup of oxide charge and interface traps, and the model that explains experimental data is discussed in details. (c) 2005 Elsevier Ltd. All rights reserved.

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页码：1343 / 1348

页数：6

相关论文

共 15 条

[1] Bias temperature reliability of p-channel high-voltage devices [J].

Demesmaeker, A ;

Pergoot, A ;

DePauw, P .

MICROELECTRONICS AND RELIABILITY, 1997, 37 (10-11) :1767-1770

[2] ANALYSIS OF GAMMA-RADIATION INDUCED INSTABILITY MECHANISMS IN CMOS TRANSISTORS [J].

DIMITRIJEV, S ;

GOLUBOVIC, S ;

ZUPAC, D ;

PEJOVIC, M ;

STOJADINOVIC, N .

SOLID-STATE ELECTRONICS, 1989, 32 (05) :349-353

[3] Effects of hydrogen transport and reactions on microelectronics radiation response and reliability [J].

Fleetwood, DM .

MICROELECTRONICS RELIABILITY, 2002, 42 (4-5) :523-541

[4] Negative bias temperature stress on low voltage p-channel DMOS transistors and the role of nitrogen [J].

Gamerith, S ;

Pölzl, M .

MICROELECTRONICS RELIABILITY, 2002, 42 (9-11) :1439-1443

[5] Charge-pumping characterization of SiO2/Si interface in virgin and irradiated power VDMOSFETs [J].

Habas, P ;

Prijic, Z ;

Pantic, D ;

Stojadinovic, ND .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 1996, 43 (12) :2197-2209

[6] THE SILICON SILICON-DIOXIDE SYSTEM - ITS MICROSTRUCTURE AND IMPERFECTIONS [J].

HELMS, CR ;

POINDEXTER, EH .

REPORTS ON PROGRESS IN PHYSICS, 1994, 57 (08) :791-852

[7] Mechanism of threshold voltage shift (ΔVth) caused by negative bias temperature instability (NBTI) in deep submicron pMOSFETs [J].

Liu, CH ;

Lee, MT ;

Lin, CY ;

Chen, JK ;

Loh, YT ;

Liou, FT ;

Schruefer, K ;

Katsetos, AA ;

Yang, ZJ ;

Rovedo, N ;

Hook, TB ;

Wann, C ;

Chen, TC .

JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS BRIEF COMMUNICATIONS & REVIEW PAPERS, 2002, 41 (4B) :2423-2425

[8] SIMPLE TECHNIQUE FOR SEPARATING THE EFFECTS OF INTERFACE TRAPS AND TRAPPED-OXIDE CHARGE IN METAL-OXIDE-SEMICONDUCTOR TRANSISTORS [J].

MCWHORTER, PJ ;

WINOKUR, PS .

APPLIED PHYSICS LETTERS, 1986, 48 (02) :133-135

[9] INTERFACE-TRAP GENERATION AT ULTRATHIN SIO2 (4-6NM)-SI INTERFACES DURING NEGATIVE-BIAS TEMPERATURE AGING [J].

OGAWA, S ;

SHIMAYA, M ;

SHIONO, N .

JOURNAL OF APPLIED PHYSICS, 1995, 77 (03) :1137-1148

[10] Analysis of postirradiation annealing of n-channel power vertical double-diffused metal-oxide-semiconductor transistors [J].

Ristic, GS ;

Pejovic, MM ;

Jaksic, AB .

JOURNAL OF APPLIED PHYSICS, 2000, 87 (07) :3468-3477