Germanium-on-insulator (GeOI) substrates - A novel engineered substrate for future high performance devices

被引:131
作者
Akatsu, Takeshi
Deguet, Chrystel
Snachez, Loic
Allibert, Frederic
Rouchon, Denis
Signamarcheix, Thomas
Richtarch, Claire
Boussagol, Alice
Loup, Virginie
Mazen, Frederic
Hartmann, Jean-Michel
Campidelli, Yves
Clavelier, Laurent
Letertre, Fabrice
Kernevez, Nelly
Mazure, Carlos
机构
[1] CEA, LETI, Grenoble, France
[2] ST Microelect, Crolles, France
关键词
germanium-on-insulator; (GeOI);
D O I
10.1016/j.mssp.2006.08.077
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Germanium-on-insulator (GeOI), which combines high mobility of charge carriers with the advantages of an Sol structure, is an attractive integration platform for the future IC technology. Also, due to its low lattice mismatch with GaAs, III-V compounds transistors as well as optoelectronic functions can be integrated on GeOI. In this paper, we review GeOI fabrication methods, and then applications that utilize GeOI wafers. The Smart Cut(TM) layer transfer technology is found to be the best method to form wafer-level GeOI structures of different diameters and thickness range down to <50 nm. Thereby, the impact of the donor wafer used for the GeOI formation is also discussed. With Ge epitaxially grown on Si utilized as a donor material for layer transfer, we see no technical obstacles in moving to 300 mm wafer diameter and beyond. However, for higher quality crystal needs, Ge bulk wafers are to be considered as the starting material. Demonstrated functioning sub-micron fully depleted GeOI MOSFETs and its compatibility with Si CMOS full sheet process exhibits its high potential for the 32 nm technology node and beyond. Furthermore, the optoelectronics applications such as high-speed and high efficiency photodetectors are discussed. As epitaxy template of high quality IIIV growth, GeOI opens the path to the integration of high performance III-V opto-electronics to mature Si technology. (C) 2006 Elsevier Ltd. All rights reserved.
引用
收藏
页码:444 / 448
页数:5
相关论文
共 29 条
[1]   200mm germanium-on-insulator (GeOI) by Smart Cut™ technology and recent GeOI pMOSFETs achievements. [J].
Akatsu, T ;
Deguet, C ;
Sanchez, L ;
Richtarch, C ;
Allibert, F ;
Letertre, F ;
Mazure, C ;
Kernevez, N ;
Clavelier, L ;
Le Royer, C ;
Hartmann, JM ;
Loup, V ;
Meuris, M ;
De Jaeger, B ;
Raskin, G .
2005 IEEE INTERNATIONAL SOI CONFERENCE, PROCEEDINGS, 2005, :137-138
[2]   Investigations of high-performance GaAs solar cells grown on Ge-Si1-xGex-Si substrates [J].
Andre, CL ;
Carlin, JA ;
Boeckl, JJ ;
Wilt, DM ;
Smith, MA ;
Pitera, AJ ;
Lee, ML ;
Fitzgerald, EA ;
Ringel, SA .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 2005, 52 (06) :1055-1060
[3]   Ge n-MOSFETs on lightly doped substrates with high-κ dielectric and TaN gate [J].
Bai, WP ;
Lu, N ;
Ritenour, A ;
Lee, ML ;
Antoniadis, DA ;
Kwong, DL .
IEEE ELECTRON DEVICE LETTERS, 2006, 27 (03) :175-178
[4]  
BORENSTEIN JT, 2001, MAT RES SOC PA
[5]  
Chui CO, 2004, 2004 INTERNATIONAL CONFERENCE ON INTEGRATED CIRCUIT DESIGN AND TECHNOLOGY, P245
[6]  
CHUI CO, 2003, IEEE P INT EL DEV M, P1831
[7]  
CLAVELIER L, 2005, SILC NAN WORKSH KYOT, P18
[8]   A review of the pseudo-MOS transistor in SOI wafers: Operation, parameter extraction, and applications [J].
Cristoloveanu, S ;
Munteanu, D ;
Liu, MST .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 2000, 47 (05) :1018-1027
[9]   Optimisation of a thin epitaxial Si layer as Ge passivation layer to demonstrate deep sub-micron n- and p-FETs on Ge-On-insulator substrates [J].
De Jaeger, B ;
Bonzom, R ;
Leys, F ;
Richard, O ;
Van Steenbergen, J ;
Winderickx, G ;
Van Moorhem, E ;
Raskin, G ;
Letertre, F ;
Billon, T ;
Meuris, M ;
Heyns, M .
MICROELECTRONIC ENGINEERING, 2005, 80 :26-29
[10]  
DEGUET C, 2006, IEEE ELECT LETT, V42, P51