A strategy using a copper/low-k BEOL process to prevent negative-bias temperature instability (NBTI) in p-MOSFETs with ultra-thin gate oxide

被引：11

作者：

Suzuki, A ^{[1
]}

Tabuchi, K ^{[1
]}

Kimura, H ^{[1
]}

Hasegawa, T ^{[1
]}

Kadomura, S ^{[1
]}

Kakamu, K ^{[1
]}

Kudo, H ^{[1
]}

Kawano, M ^{[1
]}

Tsukune, A ^{[1
]}

Yamada, M ^{[1
]}

机构：

[1] Sony Corp, SNC, LSI Technol Dev Grp, Atsugi, Kanagawa 2430014, Japan

来源：

2002 SYMPOSIUM ON VLSI TECHNOLOGY, DIGEST OF TECHNICAL PAPERS | 2002年

关键词：

D O I：

10.1109/VLSIT.2002.1015458

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper is a report on the effect of processing to form interconnects by using copper and a material with a low dielectric constant (copper/low-k) on the negative-bias temperature instability (NBTI) of p-MOSFETs. We found that the NBT-stress lifetime of copper/low-k interconnects is shorter than that of aluminum/SiO2, interconnects. The NBTI strongly depends on the cap layer over the copper/low-k layer, on the intermetal dielectric (IMD) film, on the barrier-metal film, and on the temperature of post-metal annealing (PMA). Based on these results, we developed methods for reducing the NBTI in next-generation MOSFETs.

引用

页码：216 / 217

页数：2

共 7 条

[1]

Hasegawa T., 1999, International Electron Devices Meeting 1999. Technical Digest (Cat. No.99CH36318), P623, DOI 10.1109/IEDM.1999.824230

[2] Tungsten via poisoning caused by water trapped in embedded organic low-K dielectrics [J].

Ikeda, K ;

Hasegawa, T ;

Takunaga, K ;

Fukasawa, M ;

Kito, H ;

Miyamoto, T ;

Kadomura, S .

PROCEEDINGS OF THE IEEE 2000 INTERNATIONAL INTERCONNECT TECHNOLOGY CONFERENCE, 2000, :158-160

[3] NBTI enhancement by nitrogen incorporation into ultrathin gate oxide for 0.10-μm gate CMOS generation [J].

Kimizuka, N ;

Yamaguchi, K ;

Imai, K ;

Iizuka, T ;

Liu, CT ;

Keller, RC ;

Horiuchi, T .

2000 SYMPOSIUM ON VLSI TECHNOLOGY, DIGEST OF TECHNICAL PAPERS, 2000, :92-93

[4]

Kimizuka N., 1999, VLSI S, P73

[5]

Krishnan A. T., 2001, IEDM, P865

[6] INTERFACE-TRAP GENERATION AT ULTRATHIN SIO2 (4-6NM)-SI INTERFACES DURING NEGATIVE-BIAS TEMPERATURE AGING [J].

OGAWA, S ;

SHIMAYA, M ;

SHIONO, N .

JOURNAL OF APPLIED PHYSICS, 1995, 77 (03) :1137-1148

[7] The influence of SiN films on negative bias temperature instability and characteristics in MOSFET's [J].

Sasada, K ;

Arimoto, M ;

Nagasawa, H ;

Nishida, A ;

Aoe, H ;

Dan, T ;

Fujiwara, S ;

Matsushita, Y ;

Yodoshi, K .

ICMTS 1998: PROCEEDINGS OF THE 1998 INTERNATIONAL CONFERENCE ON MICROELECTRONIC TEST STRUCTURES, 1998, :207-210

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