The role of buffer layer in strontium bismuth tantalate based ferroelectric gate mos structures for non-volatile non destructive read out memory applications

被引:12
作者
Lim, M
Kalkur, TS
机构
[1] Microlectron. Research Laboratories, Department of Electrical Engineering, Univ. Colorado at Colorado Springs, Colorado Springs
关键词
MFIS structure; NDRO memory; memory window;
D O I
10.1080/10584589708013017
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Metal Ferroelectric Insulator Semiconductor (MFIS) structure has been fabricated with strontium bismuth tantalate (SBT) as the ferroelectric thin film and zirconium oxide (ZrO2) as the insulating buffer layer. SBT film was deposited by spin-on metal organic deposition (MOD) technique. ZrO2 film was deposited by electron beam evaporation. The capacitance versus voltage characteristics(C-V) of the MFIS structure shows hysteresis and the direction of hysteresis corresponds to ferroelectric polarization. The C-V characteristics of MFIS structure shows memory window of 1.8 volts for a write/erase voltage of 9V at a sweep rate of 1 sec/1.8V. In order to understand the role of coercive voltage on the memory window in MFIS structures, C-V characteristics metal-ferroelectric metal (MFM) structures with various SBT film thickness' were also studied.
引用
收藏
页码:433 / 441
页数:9
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