Reliable tantalum-gate fully-depleted-SOI MOSFET technology featuring low-temperature processing

被引:20
作者
Ushiki, T
Yu, MC
Hirano, Y
Shimada, H
Morita, M
Ohmi, T
机构
[1] Tohoku University
关键词
D O I
10.1109/16.622603
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A reliable tantalum (Ta)-gate device technology, which can drastically reduce the number of process steps, has been developed, Ta-gate fully-depleted-silicon-on-insulator (FDSOI) MOSFET's with 0.15-mu m gate length by low-temperature processing below 500 degrees C after the gate oxide formation have good on/off characteristics. Comprehensive design guidelines for Ta-gate MOSFET's in the deep-submicrometer regime is provided by investigating a wide range of performance and reliability constraints on the process temperature and the SOI thickness, In the guideline, the recrystallization of the source/drain region gives inferior limits of the SOI thickness and the process temperature, Thermal reaction between Ta and SiO2 films sets a superior limit of the process temperature, and a short-channel effect sets a superior limit of the SOI thickness.
引用
收藏
页码:1467 / 1472
页数:6
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