Through-wafer copper electroplating for three-dimensional interconnects

被引:98
作者
Nguyen, NT
Boellaard, E
Pham, NP
Kutchoukov, VG
Craciun, G
Sarro, PM
机构
[1] Delft Univ Technol, DIMES, Lab Elect Components Mat & Technol, NL-2600 GB Delft, Netherlands
[2] Delft Univ Technol, DIMES, Elect Instrumentat Lab, NL-2600 GB Delft, Netherlands
关键词
D O I
10.1088/0960-1317/12/4/308
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 [电气工程]; 0809 [电子科学与技术];
摘要
Through-wafer electrical connections are becoming increasingly important for three-dimensional integrated circuits, microelectromechanical systems packaging and radio-frequency components, In this paper, we report our current results on the formation of through-wafer metal plugs using the copper electroplating technique. Several approaches for via filling are investigated, such as filling before or after wafer thinning, Among the methods experimented, the one-side Cu plating and bottom-up filling appears to be the most suitable technique for copper filling into high aspect ratio vias. Using this method, we demonstrate the successful filling of vias with an aspect ratio of up to 7. Copper plugs as small as 20 x 20 mum(2) are obtained uniformly over 4 inch Si wafers.
引用
收藏
页码:395 / 399
页数:5
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