An electrically modifiable synapse array of resistive switching memory

被引：104

作者：

Choi, Hyejung ^{[1
]}

Jung, Heesoo ^{[1
]}

Lee, Joonmyoung ^{[1
]}

Yoon, Jaesik ^{[1
]}

Park, Jubong ^{[1
]}

Seong, Dong-Jun ^{[1
]}

Lee, Wootae ^{[1
]}

Hasan, Musarrat ^{[1
]}

Jung, Gun-Young ^{[1
]}

Hwang, Hyunsang ^{[1
,2
]}

机构：

[1] Gwangju Inst Sci & Technol, Dept Mat Sci & Engn, Kwangju 500712, South Korea

[2] Gwangju Inst Sci & Technol, Dept Nanobio Mat & Elect, Kwangju 500712, South Korea

来源：

NANOTECHNOLOGY | 2009年 / 20卷 / 34期

关键词：

NONVOLATILE MEMORY;

D O I：

10.1088/0957-4484/20/34/345201

中图分类号：

TB3 [工程材料学];

学科分类号：

0805 ; 080502 ;

摘要：

This paper describes the resistive switching of a cross-point cell array device, with a junction area of 100 nm x 100 nm, fabricated using ultraviolet nanoimprinting. A GdOx and Cu-doped MoOx stack with platinum top and bottom electrodes served as the resistive switching layer, which shows analog memory characteristics with a resistance ratio greater than 10. To demonstrate a neural network circuit, we operated the cell array device as an electrically modifiable synapse array circuit and carried out a weighted sum operation. This demonstration of cross-point arrays, based on resistive switching memory, opens the way for feasible ultra-high density synapse circuits for future large-scale neural network systems.

引用

页数：5

共 19 条

[1]

Chen A, 2005, INT EL DEVICES MEET, P765

[2] Nanoscale molecular-switch crossbar circuits [J].

Chen, Y ;

Jung, GY ;

Ohlberg, DAA ;

Li, XM ;

Stewart, DR ;

Jeppesen, JO ;

Nielsen, KA ;

Stoddart, JF ;

Williams, RS .

NANOTECHNOLOGY, 2003, 14 (04) :462-468

[3] Reproducible hysteresis and resistive switching in metal-CuxO-metal heterostructures [J].

Dong, R. ;

Lee, D. S. ;

Xiang, W. F. ;

Oh, S. J. ;

Seong, D. J. ;

Heo, S. H. ;

Choi, H. J. ;

Kwon, M. J. ;

Seo, S. N. ;

Pyun, M. B. ;

Hasan, M. ;

Hwang, Hyunsang .

APPLIED PHYSICS LETTERS, 2007, 90 (04)

[4] A FLOATING-GATE ANALOG MEMORY DEVICE FOR NEURAL NETWORKS [J].

FUJITA, O ;

AMEMIYA, Y .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 1993, 40 (11) :2029-2055

[5] PROPOSAL OF ADAPTIVE-LEARNING NEURON CIRCUITS WITH FERROELECTRIC ANALOG-MEMORY WEIGHTS [J].

ISHIWARA, H .

JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS BRIEF COMMUNICATIONS & REVIEW PAPERS, 1993, 32 (1B) :442-446

[6] ELECTRONIC NEURAL NETWORK CHIPS [J].

JACKEL, LD ;

GRAF, HP ;

HOWARD, RE .

APPLIED OPTICS, 1987, 26 (23) :5077-5080

[7] Circuit fabrication at 17 nm half-pitch by nanoimprint lithography [J].

Jung, GY ;

Johnston-Halperin, E ;

Wu, W ;

Yu, ZN ;

Wang, SY ;

Tong, WM ;

Li, ZY ;

Green, JE ;

Sheriff, BA ;

Boukai, A ;

Bunimovich, Y ;

Heath, JR ;

Williams, RS .

NANO LETTERS, 2006, 6 (03) :351-354

[8]

KIM S, 1992, ANALOG INTEGR CIRC S, V2, P345, DOI 10.1007/BF00228716

[9] A Nonvolatile Memory With Resistively Switching Methyl-Silsesquioxane [J].

Meier, Matthias ;

Schindler, Christina ;

Gilles, Sandra ;

Rosezin, Roland ;

Ruediger, Andreas ;

Kuegeler, Carsten ;

Waser, Rainer .

IEEE ELECTRON DEVICE LETTERS, 2009, 30 (01) :8-10

[10] Nanometer-scale switches using copper sulfide [J].

Sakamoto, T ;

Sunamura, H ;

Kawaura, H ;

Hasegawa, T ;

Nakayama, T ;

Aono, M .

APPLIED PHYSICS LETTERS, 2003, 82 (18) :3032-3034

← 1 2 →