Gate-bias stress in amorphous oxide semiconductors thin-film transistors

被引:208
作者
Lopes, M. E. [1 ]
Gomes, H. L. [1 ]
Medeiros, M. C. R. [1 ]
Barquinha, P. [2 ,3 ]
Pereira, L. [2 ,3 ]
Fortunato, E. [2 ,3 ]
Martins, R. [2 ,3 ]
Ferreira, I. [2 ,3 ]
机构
[1] Univ Algarve, CEOT, P-8005139 Faro, Portugal
[2] Univ Nova Lisboa, Dept Mat Sci, CENIMAT, I3N, P-2829516 Caparica, Portugal
[3] Univ Nova Lisboa, CEMOP, Fac Sci & Technol, P-2829516 Caparica, Portugal
关键词
amorphous semiconductors; gallium compounds; indium compounds; plasma CVD; thin film transistors; zinc compounds; PERFORMANCE; SHIFTS; TIME;
D O I
10.1063/1.3187532
中图分类号
O59 [应用物理学];
学科分类号
摘要
A quantitative study of the dynamics of threshold-voltage shifts with time in gallium-indium zinc oxide amorphous thin-film transistors is presented using standard analysis based on the stretched exponential relaxation. For devices using thermal silicon oxide as gate dielectric, the relaxation time is 3x10(5) s at room temperature with activation energy of 0.68 eV. These transistors approach the stability of the amorphous silicon transistors. The threshold voltage shift is faster after water vapor exposure suggesting that the origin of this instability is charge trapping at residual-water-related trap sites.
引用
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页数:3
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