Optimized NH3 annealing process for high-quality HfSiON gate oxide

被引:26
作者
Akbar, MS [1 ]
Cho, HJ [1 ]
Choi, R [1 ]
Kang, CS [1 ]
Kang, CY [1 ]
Choi, CH [1 ]
Rhee, SJ [1 ]
Kim, YH [1 ]
Lee, JC [1 ]
机构
[1] Univ Texas, Microelect Res Ctr, Austin, TX 78758 USA
关键词
charge trap; effective oxide thickness (EOT); flatband voltage; Hf-silicate; HfSiON; hysteresis;
D O I
10.1109/LED.2004.830270
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Optimization of fabrication process in obtaining high-quality HfSiON gate-oxide metal-oxide semiconductor field-effect transistors (MOSFETs) by NH3 post-deposition anneal (PDA) has been performed. At 600degreesC anneal temperature, a longer anneal duration resulted in reduced leakage current density (J), reduced trapped charges, and lower hysteresis in capacitance-voltage curves, but with a slight increase in effective oxide thickness (EOT). Subsequent interfacial layer growth with longer anneal duration was attributed to the increase in EOT. MOSFET, fabricated by the optimized process of 600degreesC, 40 s NH3 PDA, showed superior I-d-V-d (drain current-drain voltage) and charge-trapping characteristics as compared to control Hf-Silicate.
引用
收藏
页码:465 / 467
页数:3
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