Variation-driven device sizing for minimum energy sub-threshold circuits

被引:101
作者
Kwong, Joyce [1 ]
Chandrakasan, Anantha P. [1 ]
机构
[1] MIT, Cambridge, MA 02139 USA
来源
ISLPED '06: PROCEEDINGS OF THE 2006 INTERNATIONAL SYMPOSIUM ON LOW POWER ELECTRONICS AND DESIGN | 2006年
关键词
sub-threshold circuits; minimum energy point; delay model;
D O I
10.1109/LPE.2006.4271799
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Sub-threshold operation is a compelling approach for energy-constrained applications, but increased sensitivity to variation must be mitigated. We explore variability metrics and the variation sensitivity of stacked device topologies. We show that upsizing is necessary to achieve robustness at reduced voltages and propose a design methodology to meet yield constraints. The need for upsizing imposes an energy overhead, influencing the optimal supply voltage to minimize energy. Finally, we characterize performance variability by summing delay distributions of each stage in an arbitrary critical path and achieve results accurate to within 10% of Monte Carlo simulation.
引用
收藏
页码:8 / 13
页数:6
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