Erase/write cycle tests of n-MOSFET's with Si-implanted gate-SiO2

被引：18

作者：

Ohzone, T ^{[1
]}

Matsuda, T ^{[1
]}

Hori, T ^{[1
]}

机构：

[1] MATSUSHITA ELECT IND CO LTD, SEMICOND RES CTR, OSAKA 570, JAPAN

来源：

IEEE TRANSACTIONS ON ELECTRON DEVICES | 1996年 / 43卷 / 09期

关键词：

D O I：

10.1109/16.535321

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

For discussing an applicability of a MOSFET with Si-implanted gate-SiO2 of 50 nm thickness to a non volatile random access memory (NVRAM) operating more than 3.3 x 10(15) erase/write (E/W) cycles, E/W-cycle tests were performed up tea 10(11) cycles by measuring a hysteresis curve observed in a source follower MOSFET in which a sine-wave voltage of 100 kHz was supplied tea the gate, Degradations in a threshold-voltage window of 15 V and a gain factor were scarcely observed in a MOSFET with Si-implantation at 50 keV/1 x 10(16) cm(-2) at a gate voltage of +/-40 V, Those degradations observed in a MOSFET with 25 keV/3 x 10(16) cm(-2) were improved by lowering the gate voltage from +/-40 V to +/-30 V in sacrificing the smaller threshold-voltage window from 20 to 8.5 V.

引用

页码：1374 / 1381

页数：8

共 23 条

[1]

ARITOME S, 1994, IEICE T ELECTRON, VE77C, P1287

[2]

Balk P., 1988, SI SIO2 SYSTEM

[3] DIFFUSION OF SILICON IN AMORPHOUS SILICA [J].

BREBEC, G ;

SEGUIN, R ;

SELLA, C ;

BEVENOT, J ;

MARTIN, JC .

ACTA METALLURGICA, 1980, 28 (03) :327-333

[4] PULSED-LASER ABLATION SYNTHESIS AND CHARACTERIZATION OF LAYERED PT/SRBI2TA2O9/PT FERROELECTRIC CAPACITORS WITH PRACTICALLY NO POLARIZATION FATIGUE [J].

DAT, R ;

LEE, JK ;

AUCIELLO, O ;

KINGON, AI .

APPLIED PHYSICS LETTERS, 1995, 67 (04) :572-574

[5] ENHANCED CONDUCTION AND MINIMIZED CHARGE TRAPPING IN ELECTRICALLY ALTERABLE READ-ONLY MEMORIES USING OFF-STOICHIOMETRIC SILICON DIOXIDE FILMS [J].

DIMARIA, DJ ;

DONG, DW ;

PESAVENTO, FL ;

LAM, C ;

BRORSON, SD .

JOURNAL OF APPLIED PHYSICS, 1984, 55 (08) :3000-3019

[6] OPTIMIZED SILICON-RICH OXIDE (SRO) DEPOSITION PROCESS FOR 5-V-ONLY FLASH EEPROM APPLICATIONS [J].

DORI, L ;

ACOVIC, A ;

DIMARIA, DJ ;

HSU, CH .

IEEE ELECTRON DEVICE LETTERS, 1993, 14 (06) :283-285

[7] PULSE MEASUREMENTS ON FERROELECTRIC CAPACITORS SIMULATING MEMORY SWITCHING [J].

DORMANS, GJM ;

LARSEN, PK .

APPLIED PHYSICS LETTERS, 1994, 65 (26) :3326-3328

[8]

Fukuda H., 1992, International Electron Devices Meeting 1992. Technical Digest (Cat. No.92CH3211-0), P465, DOI 10.1109/IEDM.1992.307402

[9]

Gibbons J.F., 1975, PROJECTED RANGE STAT, V2nd

[10] MEMORY EFFECTS OF SILICON-IMPLANTED OXIDES FOR ELECTRICALLY ERASABLE PROGRAMMABLE READ-ONLY MEMORY APPLICATIONS [J].

HAO, MY ;

HWANG, HS ;

LEE, JC .

APPLIED PHYSICS LETTERS, 1993, 62 (13) :1530-1532

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