Influence of various process steps on the reliability of PMOSFETs submitted to negative bias temperature instabilities

被引：9

作者：

Benard, Christelle ^{[1
,2
]}

Math, Gaetan ^{[1
,2
]}

Fornara, Pascal ^{[2
]}

Ogier, Jean-Luc ^{[2
]}

Goguenheim, Didier ^{[1
,3
]}

机构：

[1] CNRS, Inst Mat Microelect & Nanosci Prov, IM2NP, UMR 6242, F-83000 Toulon, France

[2] ST Microelect, Zone Ind Rousset, F-13790 Rousset, France

[3] Inst Super Elect & Numer ISEN Toulon, IM2NP, Toulon, France

来源：

MICROELECTRONICS RELIABILITY | 2009年 / 49卷 / 9-11期

关键词：

MOS DEVICES; DEGRADATION; FLUORINE; DEFECTS; STRESS;

D O I：

10.1016/j.microrel.2009.06.022

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

in this paper, we analyze the impact of various process steps on the reliability of PMOSFETs submitted to Negative Bias Temperature instabilities stress conditions. We give some evidence of the complete thermal anneal of interface states induced by NBTI and investigate the influence of the oxide thickness and of the final forming gas anneal. Then we show a NBTI lifetime improvement after a fluorine implant through the gate and an arsenic bulk doping value increase. (C) 2009 Elsevier Ltd. All rights reserved.

引用

页码：1008 / 1012

页数：5

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