共 33 条
- [1] [Anonymous], 2001, INT TECHNOLOGY ROADM
- [2] Antoniadis DA, 2001, SIMULATION OF SEMICONDUCTOR PROCESSES AND DEVICES 2001, P156
- [3] Assad F., 1999, International Electron Devices Meeting 1999. Technical Digest (Cat. No.99CH36318), P547, DOI 10.1109/IEDM.1999.824213
- [5] 30nm physical gate length CMOS transistors with 1.0 ps n-MOS and 1.7 ps p-MOS gate delays [J]. INTERNATIONAL ELECTRON DEVICES MEETING 2000, TECHNICAL DIGEST, 2000, : 45 - 48
- [7] Carrier mobilities and process stability of strained Si n- and p-MOSFETs on SiGe virtual substrates [J]. JOURNAL OF VACUUM SCIENCE & TECHNOLOGY B, 2001, 19 (06): : 2268 - 2279
- [8] DAI H, COMMUNICATION
- [9] Fang H., 1992, International Electron Devices Meeting 1992. Technical Digest (Cat. No.92CH3211-0), P621, DOI 10.1109/IEDM.1992.307437