Low-voltage and high-gain pentacene inverters with plasma-enhanced atomic-layer-deposited gate dielectrics

被引：18

作者：

Koo, Jae Bon ^{[1
]}

Yun, Sun Jin ^{[1
]}

Lim, Jung Wook ^{[1
]}

Kim, Seong Hyun ^{[1
]}

Ku, Chan Hoe ^{[1
]}

Lim, Sang Chul ^{[1
]}

Lee, Jung Hun ^{[1
]}

Zyung, Taehyoung ^{[1
]}

机构：

[1] IT Convergence & Component Lab, Elect & Telecommun Res Inst, Taejon 305700, South Korea

来源：

APPLIED PHYSICS LETTERS | 2006年 / 89卷 / 03期

关键词：

D O I：

10.1063/1.2234835

中图分类号：

O59 [应用物理学];

学科分类号：

摘要：

The pentacene thin-film transistors with the plasma-enhanced atomic-layer-deposited 150 nm thick Al2O3 or 120 nm thick ZrO2 have been operated at gate voltages between -3 and 3 V. The inverter with a ZrO2 gate dielectric shows a gain of 49 and a full swing from supply voltage (V-dd) to 0 V, operating at input voltages (V-in) from 0 to -1 V and at V-dd of -1 V. The hysteresis observed in the voltage transfer characteristic of the inverter depends on the scan range of V-in applied to the driver transistor, regardless of the V-dd applied to the load transistor.

引用

页数：3

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