Fabrication of high electron mobility transistors with T-gates by nanoimprint lithography

被引:19
作者
Chen, Y [1 ]
Macintyre, D [1 ]
Boyd, E [1 ]
Moran, D [1 ]
Thayne, I [1 ]
Thoms, S [1 ]
机构
[1] Univ Glasgow, Nanoelectr Res Ctr, Dept Elect & Elect Engn, Glasgow G12 8LT, Lanark, Scotland
来源
JOURNAL OF VACUUM SCIENCE & TECHNOLOGY B | 2002年 / 20卷 / 06期
关键词
D O I
10.1116/1.1520564
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
T-gates are commonly used in high frequency low noise transistors on III-V materials since they provide a combination of short gate length and low gate resistance. Nanoimprint lithography can produce minimum pattern feature sizes equivalent to those attainable by high resolution, electron beam lithography and it has potential advantages in terms of speed and cost. The imprint lithography step must be reliable and compatible with existing, device process flows.. In this article we describe a bilayer resist imprinting procedure for the fabrication of 120 nm T-gates for high electron mobility transistors. The results of transistor do characterization are also presented and are similar to those obtained for transistors fabricated on the same material with gates realized by electron beam lithography. (C) 2002 American Vacuum Society.
引用
收藏
页码:2887 / 2890
页数:4
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