A novel low temperature integration of hybrid CMOS devices on flexible substrates

被引：26

作者：

Gowrisanker, S. ^{[1
]}

Quevedo-Lopez, M. A. ^{[1
]}

Alshareef, H. N. ^{[1
]}

Gnade, B. E. ^{[1
]}

Venugopal, S. ^{[2
]}

Krishna, R. ^{[2
]}

Kaftanoglu, K. ^{[2
]}

Allee, D. R. ^{[2
]}

机构：

[1] Univ Texas Dallas, Dept Mat Sci & Engn, Richardson, TX 75080 USA

[2] Arizona State Univ, Flexible Display Ctr, Tempe, AZ 85284 USA

来源：

ORGANIC ELECTRONICS | 2009年 / 10卷 / 07期

基金：

美国国家科学基金会;

关键词：

Flexible electronics; Hybrid CMOS; NAND gate; NOR gate; THIN-FILM TRANSISTORS; COMPLEMENTARY CIRCUITS; ELECTRONICS TECHNOLOGY; SI; PENTACENE; TFTS;

D O I：

10.1016/j.orgel.2009.06.012

中图分类号：

T [工业技术];

学科分类号：

08 ;

摘要：

In this work we demonstrate a novel integration approach to fabricate CMOS circuits on plastic substrates (poly-ethylene naphthalate, PEN). We use pentacene and amorphous silicon (a-Si:H) thin-film transistors (TFTs) as p-channel and n-channel devices, respectively. The maximum processing temperature for n-channel TFTs is 180 degrees C and 120 degrees C for the p-channel TFTs. CMOS circuits demonstrated in this work include inverters, NAND, and NOR gates. Carrier mobilities for nMOS and pMOS after the CMOS integration process flow are 0.75 and 0.05 cm(2)/Vs, respectively. Threshold voltages (V-t) are 1.14 V for nMOS and - 1.89 V for pMOS. The voltage transfer curve of the CMOS inverter showed a gain of 16. Correct logic operation of integrated flexible NAND and NOR CMOS gates is also demonstrated. In addition, we show that the pMOS gate dielectric is likely failing after electrical stress. Published by Elsevier B.V.

引用

页码：1217 / 1222

页数：6

共 30 条

[1] Inverse staggered poly-Si and amorphous Si double structure TFT's for LCD panels with peripheral driver circuits integration [J].

Aoyama, T ;

Ogawa, K ;

Mochizuki, Y ;

Konishi, N .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 1996, 43 (05) :701-705

[2]

BONSE M, 1998, INT EL DEV M

[3] Hybrid organic inorganic complementary circuits [J].

Dodabalapur, A ;

Baumbach, J ;

Baldwin, K ;

Katz, HE .

APPLIED PHYSICS LETTERS, 1996, 68 (16) :2246-2248

[4] Time dependent breakdown characteristics of parylene dielectric in metal-insulator-metal capacitors [J].

Gowrisanker, S. ;

Quevedo-Lopez, M. A. ;

Alshareef, H. N. ;

Gnade, B. E. .

ORGANIC ELECTRONICS, 2009, 10 (05) :1024-1027

[5] Organic Thin-Film Transistors with Low Threshold Voltage Variation on Low-Temperature Substrates [J].

Gowrisanker, S. ;

Ai, Y. ;

Jia, H. ;

Quevedo-Lopez, M. A. ;

Alshareef, H. N. ;

Trachtenberg, I. ;

Stiegler, H. ;

Edwards, H. ;

Barnett, R. ;

Gnade, B. E. .

ELECTROCHEMICAL AND SOLID STATE LETTERS, 2009, 12 (03) :H50-H53

[6] Impact of semiconductor/contact metal thickness ratio on organic thin-film transistor performance [J].

Gowrisanker, S. ;

Ai, Y. ;

Quevedo-Lopez, M. A. ;

Jia, H. ;

Alshareef, H. N. ;

Vogel, E. ;

Gnade, B. .

APPLIED PHYSICS LETTERS, 2008, 92 (15)

[7]

GOWRISANKER S, 2008, P FLEX EL DISPL C EX, P1

[8]

Hamedi M, 2007, NAT MATER, V6, P357, DOI [10.1038/nmat1884, 10.1038/nma11884]

[9] Amorphous silicon thin-film transistors with field-effect mobilities of 2 cm2/V s for electrons and 0.1 cm2/V s for holes [J].

Han, Lin ;

Mandlik, Prashant ;

Cherenack, Kunigunde H. ;

Wagner, Sigurd .

APPLIED PHYSICS LETTERS, 2009, 94 (16)

[10] Theory of the organic field-effect transistor [J].

Horowitz, G ;

Hajlaoui, R ;

Bourguiga, R ;

Hajlaoui, M .

SYNTHETIC METALS, 1999, 101 (1-3) :401-404

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