A 900-MHz 1-V CMOS frequency synthesizer

被引:9
作者
Dehng, GK [1 ]
Yang, CY [1 ]
Hsu, JM [1 ]
Liu, SI [1 ]
机构
[1] Natl Taiwan Univ, Dept Elect Engn, Taipei 10617, Taiwan
关键词
phase-locked loop; phase noise; prescaler; voltage doubler;
D O I
10.1109/4.859512
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A 900-MHz I-V frequency synthesizer has been fabricated in a standard 0.35-mu m CMOS technology. The frequency synthesizer consists of a divide-by-128/129 and 64/65 dual-modulus prescaler, phase-frequency detector, charge pump, and voltage-doubler circuit with an external voltage-controlled oscillator (VCO) and passive loop filter. The on-chip voltage-doubler circuit converts the l-V supply voltage to the higher voltage which supplies the prescaler internally. In this way, the 900-MHz l-V frequency synthesizer with an external VCO can be achieved, The measured phase noise is -112.7 dBc/Hz at a 100-kHz offset from the carrier, and the synthesizer dissipates 3.56 mW (not including VCO's) from a single l-V supply when the switching frequency of the on-chip voltage doubler is 200 kHz and the power efficiency of the voltage doubler is 77.8%. The total chip area occupies 0.73 mm(2).
引用
收藏
页码:1211 / 1214
页数:4
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