Spatial-phase-locked electron-beam lithography with a delay-locked loop

被引：14

作者：

Goodberlet, J ^{[1
]}

Ferrera, J ^{[1
]}

Smith, HI ^{[1
]}

机构：

[1] MIT, Elect Res Lab, Cambridge, MA 02139 USA

来源：

JOURNAL OF VACUUM SCIENCE & TECHNOLOGY B | 1997年 / 15卷 / 06期

关键词：

D O I：

10.1116/1.589632

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A delay-locked loop is used in a one-dimensional demonstration of the global-fiducial-grid mode of spatial-phase-locked electron-beam lithography. A pattern-placement precision of sigma similar to 5 nm is demonstrated under nonideal conditions. Results compare well with numerical simulations. (C) 1997 American Vacuum Society.

引用

页码：2293 / 2297

页数：5

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