Random telegraph signal in flash memory: Its impact on scaling of multilevel flash memory beyond the 90-nm node

被引:74
作者
Kurata, Hideaki [1 ]
Otsuga, Kazuo
Kotabe, Akira
Kajiyama, Shinya
Osabe, Taro
Sasago, Yoshitaka
Narumi, Shunichi
Tokami, Kenji
Kamohara, Shiro
Tsuchiya, Osamu
机构
[1] Hitachi Ltd, Cent Res Lab, Tokyo 1858601, Japan
[2] Reneasas Technol Corp, Tokyo 1006334, Japan
关键词
flash memories; Monte Carlo simulation; multi-level cell; random telegraph signals; scaling;
D O I
10.1109/JSSC.2007.897158
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Threshold-voltage (Vth) fluctuation due to random telegraph signal (RTS) in flash memory was observed for the first time. A large amount of data of Vth fluctuation was acquired by using a 90-nm-node memory array, and it was confirmed that a few memory cells have large RTS fluctuation exceeding 0.2 V. It was found that program-and-erase cycles increase Vth amplitude in a flash memory. It was also found by simulation and measurement that tail-bits are generated due to RTS in multilevel flash operation. The amount of Vth broadening due to the tail-bits was estimated to become larger as the scaling of memory cells advances and reaches more than 0.3 V in the 45-nm node. These results thus demonstrate that RTS will become a prominent issue in designing multilevel flash memory in the 45-nm node and beyond.
引用
收藏
页码:1362 / 1369
页数:8
相关论文
共 20 条
[1]  
AGOSTINELLI M, 2005, IEDM, P952
[2]   Random telegraph signal amplitudes in sub 100 nm (decanano) MOSFETs: A 3D 'atomistic' simulation study [J].
Asenov, A ;
Balasubramaniam, R ;
Brown, AR ;
Davies, JH ;
Saini, S .
INTERNATIONAL ELECTRON DEVICES MEETING 2000, TECHNICAL DIGEST, 2000, :279-282
[3]   A dual-mode NAND flash memory: 1-Gb multilevel and high-performance 512-Mb single-level modes [J].
Cho, T ;
Lee, YT ;
Kim, EC ;
Lee, JW ;
Choi, S ;
Lee, S ;
Kim, DH ;
Han, WG ;
Lim, YH ;
Lee, JD ;
Choi, JD ;
Suh, KD .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2001, 36 (11) :1700-1706
[4]   Multilevel Flash cells and their trade-offs [J].
Eitan, B ;
Kazerounian, R ;
Roy, A ;
Crisenza, G ;
Cappelletti, P ;
Modelli, A .
IEDM - INTERNATIONAL ELECTRON DEVICES MEETING, TECHNICAL DIGEST 1996, 1996, :169-172
[5]   RANDOM TELEGRAPH NOISE OF DEEP-SUBMICROMETER MOSFETS [J].
HUNG, KK ;
KO, PK ;
HU, CM ;
CHENG, YC .
IEEE ELECTRON DEVICE LETTERS, 1990, 11 (02) :90-92
[6]   A UNIFIED MODEL FOR THE FLICKER NOISE IN METAL OXIDE-SEMICONDUCTOR FIELD-EFFECT TRANSISTORS [J].
HUNG, KK ;
KO, PK ;
HU, CM ;
CHENG, YC .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 1990, 37 (03) :654-665
[7]   A 117-mm(2) 3.3-V only 128-Mb multilevel NAND flash memory for mass storage applications [J].
Jung, TS ;
Choi, YJ ;
Suh, KD ;
Suh, BH ;
Kim, JK ;
Lim, YH ;
Koh, YN ;
Park, JW ;
Lee, KJ ;
Park, JH ;
Park, KT ;
Kim, JR ;
Yi, JH ;
Lim, HK .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1996, 31 (11) :1575-1583
[8]   NOISE IN SOLID-STATE MICROSTRUCTURES - A NEW PERSPECTIVE ON INDIVIDUAL DEFECTS, INTERFACE STATES AND LOW-FREQUENCY (1/F) NOISE [J].
KIRTON, MJ ;
UREN, MJ .
ADVANCES IN PHYSICS, 1989, 38 (04) :367-468
[9]   Constant-charge-injection programming: A novel high-speed programming method for multilevel flash memories [J].
Kurata, H ;
Saeki, S ;
Kobayashi, T ;
Sasago, Y ;
Arigane, T ;
Otsuga, K ;
Kawahara, T .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2005, 40 (02) :523-531
[10]   Constant-charge-injection programming for 10-MB/s multilevel AG-AND flash memories [J].
Kurata, H ;
Saeki, S ;
Kobayashi, T ;
Sasago, Y ;
Kawahara, T .
2002 SYMPOSIUM ON VLSI CIRCUITS, DIGEST OF TECHNICAL PAPERS, 2002, :302-303