Ultra high frequency static dividers >150 GHz in a narrow mesa InGaAs/InP DHBT technology

被引:15
作者
Griffith, Z [1 ]
Dahlström, M [1 ]
Rodwell, MJW [1 ]
Urteaga, M [1 ]
Pierson, R [1 ]
Rowell, P [1 ]
Brar, B [1 ]
Lee, S [1 ]
Nguyen, N [1 ]
Nguyen, C [1 ]
机构
[1] Univ Calif Santa Barbara, Dept Elect & Comp Engn, Santa Barbara, CA 93106 USA
来源
PROCEEDING OF THE 2004 BIPOLAR/BICMOS CIRCUITS AND TECHNOLOGY MEETING | 2004年
关键词
D O I
10.1109/BIPOL.2004.1365773
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A static frequency divider with a maximum clock frequency > 150 GHz was designed and fabricated in a narrow mesa InP/In0.53Ga0.47As/InP DHBT technology. The divider operation is fully static, operating from f(clk) = 3 GHz to 152.0 GHz while dissipating 594.7 mW of power in the circuit core from a -4.07 Volt supply. The circuit employs single-buffered emitter coupled logic (ECL) and inductive peaking. The transistors have an emitter junction width of 0.5 mum and a 3.0 collector-to-emitter area ratio. A microstrip wiring environment is employed for high interconnect density, and to minimize resonances and impedance mismatch at frequencies > 100 GHz.
引用
收藏
页码:176 / 179
页数:4
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