Low-Temperature Synthesis of Graphene and Fabrication of Top-Gated Field Effect Transistors without Using Transfer Processes

被引:94
作者
Kondo, Daiyu [1 ,2 ,3 ]
Sato, Shintaro [1 ,2 ,3 ]
Yagi, Katsunori [1 ]
Harada, Naoki [1 ]
Sato, Motonobu [1 ,2 ,3 ]
Nihei, Mizuhisa [1 ,2 ,3 ]
Yokoyama, Naoki [1 ]
机构
[1] Fujitsu Labs Ltd, Kanagawa 2430197, Japan
[2] Fujitsu Ltd, Kanagawa 2430197, Japan
[3] CREST JST, Chiyoda Ku, Tokyo 1020075, Japan
关键词
CHEMICAL-VAPOR-DEPOSITION; LAYER GRAPHENE; LARGE-AREA; FILMS;
D O I
10.1143/APEX.3.025102
中图分类号
O59 [应用物理学];
学科分类号
摘要
Thickness-controlled growth of few-layer and multi-layer graphene was performed at 650 degrees C by thermal chemical vapor deposition, and top-gated field effect transistors (FETs) were fabricated directly on a large SiO2/Si substrate without graphene-transfer processes. Graphene was synthesized on patterned Fe films. The iron was subsequently etched after both ends of the graphene were fixed by source and drain electrodes, leaving the graphene channels bridging the electrodes all over the substrate. Top-gated FETs were then made after covering the channels with HfO2. The fabricated devices exhibit ambipolar behavior and can sustain a high-density current. The growth mechanism of graphene was also investigated. (C) 2010 The Japan Society of Applied Physics DOI: 10.1143/APEX.3.025102
引用
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页数:3
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