ANALYTICAL MODELS FOR N(+)-P(+) DOUBLE-GATE SOI MOSFETS

Previously, we proposed n(+)-p(+) double-gate SOI MOSFET's, which have nf polysilicon for the back gate and n(+) polysilicon for the back gate and p(+)polysilicon for the front gate to adjust a threshold voltage, and demonstrated high speed operation, In this parer, we establish analytical models for this device, This transistor has two threshold voltages related to n(+) and p(+) polysilicon gates: V-th1 and V-th2, respectively, V-th1 is a function of the gate oxide thickness to(x) and SOI thickness t(Si) and is about 0.25 V when to(x)/t(Si) = 5, while V-th2 is insensitive to to(x) and t(Si) and is about 1 V. We also derive models for conduction charge and drain current and verified their validity by numerical analysis, Furthermore, we establish a scaling theory unique to the de,ice, and show how to design the device parameters with decreasing a gate length, We show numerically that we can design sub 0.1 mu m gate length devices with an appropriate threshold voltage and an ideal subthreshold suing, We also show that our theory agrees well with experimental data.