DESIGN AND ANALYSIS OF A HIERARCHICAL CLOCK DISTRIBUTION-SYSTEM FOR SYNCHRONOUS STANDARD CELL MACROCELL VLSI

被引:21
作者
FRIEDMAN, EG
POWELL, S
机构
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D O I
10.1109/JSSC.1986.1052510
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
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页码:240 / 246
页数:7
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