CMOS SOI HARDENING AT 100 MRAD(SIO2)

被引：40

作者：

LERAY, JL ^{[1
]}

DUPONTNIVET, E ^{[1
]}

PERE, JF ^{[1
]}

COIC, YM ^{[1
]}

RAFFAELLI, M ^{[1
]}

AUBERTONHERVE, AJ ^{[1
]}

BRUEL, M ^{[1
]}

GIFFARD, B ^{[1
]}

MARGAIL, J ^{[1
]}

机构：

[1] CEA,F-38019 GRENOBLE,FRANCE

来源：

IEEE TRANSACTIONS ON NUCLEAR SCIENCE | 1990年 / 37卷 / 06期

关键词：

D O I：

10.1109/23.101223

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Hardened CMOS/SOI 29101 microprocessor, elementary cells and transistors have been irradiated at levels between 10 Mrad(SiO2) and 1 Grad(SiO2) (60Co and 10 keV x-rays). SIMOX buried oxide behavior in the range of 100 Mrad(SiO2) and a channel-stopped MOS/SOI structure avoiding lateral leakage current are presented. These two items indicate the feasibility of a CMOS/SOI technology operating in the hundred Mrad(SiO2) range. © 1990 IEEE

引用

页码：2013 / 2019

页数：7

共 17 条

[1]

AUBERTONHERVE AJ, 1989, SEP EUR SOL STAT DEV

[2]

BINKLEY DM, 1982, IEEE T NUCL SCI, V29, P1500

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