AN EXPERIMENTAL 80-NS 1-MBIT DRAM WITH FAST PAGE OPERATION

被引：6

作者：

KALTER, HL

COPPENS, PD

ELLIS, WF

FIFIELD, JA

KOKOSZKA, DJ

LEASURE, TL

MILLER, CP

NGUYEN, Q

PAPRITZ, RE

PATTON, CS

POPLAWSKI, JM

TOMASHOT, SW

VANDERHOEVEN, WB

机构：

[1] IBM, Essex Junction, VT, USA, IBM, Essex Junction, VT, USA

来源：

IEEE JOURNAL OF SOLID-STATE CIRCUITS | 1985年 / 20卷 / 05期

关键词：

1 MBIT DYNAMIC RAM (DRAM) - DEVICE-OVERLAPPED I/O CELL - FAST PAGE MODE CYCLE - PIN GRID ARRAY MODULE - SOFT ERROR RATE PROTECTION;

D O I：

10.1109/JSSC.1985.1052415

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

引用

页码：914 / 923

页数：10

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