A 30-PS SI BIPOLAR IC USING SUPER SELF-ALIGNED PROCESS TECHNOLOGY

[1] LARGE-SIGNAL BEHAVIOR OF JUNCTION TRANSISTORS [J]. PROCEEDINGS OF THE INSTITUTE OF RADIO ENGINEERS, 1954, 42 (12): : 1761 - 1772

[2] PERFORMANCE LIMITATIONS OF SILICON BIPOLAR-TRANSISTORS [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1979, 14 (02) : 337 - 343

[3] HORIGUCHI S, 1985, 32TH ISSCC THPM 15 2, P198

[4] KONAKA S, 1984, 16TH P C SOL STAT DE, P209

[5] PREPARATION OF LOW-REFLECTIVITY AMORPHOUS-SILICON USING DC MAGNETRON SPUTTERING [J]. JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS, 1984, 23 (10): : 1304 - 1309

[6] MIYANAGA H, 1984, 16TH C SOL STAT DEV, P225

[7] MIYANAGA H, 1984, S VLSI TECH, P50

[8] HIGH-SPEED BIPOLAR ICS USING SUPER SELF-ALIGNED PROCESS TECHNOLOGY [J]. JAPANESE JOURNAL OF APPLIED PHYSICS, 1981, 20 (01) : 155 - 159

[9] GIGABIT LOGIC BIPOLAR TECHNOLOGY - ADVANCED SUPER SELF-ALIGNED PROCESS TECHNOLOGY [J]. ELECTRONICS LETTERS, 1983, 19 (08) : 283 - 284

[10] SAKAI T, 1980, 12TH P C SOL STAT DE, P67

[1] LARGE-SIGNAL BEHAVIOR OF JUNCTION TRANSISTORS [J]. PROCEEDINGS OF THE INSTITUTE OF RADIO ENGINEERS, 1954, 42 (12): : 1761 - 1772

[2] PERFORMANCE LIMITATIONS OF SILICON BIPOLAR-TRANSISTORS [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1979, 14 (02) : 337 - 343

[3] HORIGUCHI S, 1985, 32TH ISSCC THPM 15 2, P198

[4] KONAKA S, 1984, 16TH P C SOL STAT DE, P209

[5] PREPARATION OF LOW-REFLECTIVITY AMORPHOUS-SILICON USING DC MAGNETRON SPUTTERING [J]. JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS, 1984, 23 (10): : 1304 - 1309

[6] MIYANAGA H, 1984, 16TH C SOL STAT DEV, P225

[7] MIYANAGA H, 1984, S VLSI TECH, P50

[8] HIGH-SPEED BIPOLAR ICS USING SUPER SELF-ALIGNED PROCESS TECHNOLOGY [J]. JAPANESE JOURNAL OF APPLIED PHYSICS, 1981, 20 (01) : 155 - 159

[9] GIGABIT LOGIC BIPOLAR TECHNOLOGY - ADVANCED SUPER SELF-ALIGNED PROCESS TECHNOLOGY [J]. ELECTRONICS LETTERS, 1983, 19 (08) : 283 - 284

[10] SAKAI T, 1980, 12TH P C SOL STAT DE, P67