MOS AND BIPOLAR VLSI TECHNOLOGIES USING ELECTRON-BEAM LITHOGRAPHY

被引：4

作者：

VARNELL, GL

SHAH, PL

HAVEMANN, RH

机构：

来源：

PROCEEDINGS OF THE IEEE | 1983年 / 71卷 / 05期

关键词：

D O I：

10.1109/PROC.1983.12645

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

引用

页码：612 / 639

页数：28

共 31 条

[1] TOPOLOGY OF SILICON STRUCTURES WITH RECESSED SIO2 [J].

BASSOUS, E ;

YU, HN ;

MANISCALCO, V .

JOURNAL OF THE ELECTROCHEMICAL SOCIETY, 1976, 123 (11) :1729-1737

[2]

Broers A. N., 1980, International Electron Devices Meeting. Technical Digest, P2

[3]

CHATTERJEE PK, 1982, IEEE J SOLID STATE C, V17, P330

[4] DESIGN OF ION-IMPLANTED MOSFETS WITH VERY SMALL PHYSICAL DIMENSIONS [J].

DENNARD, RH ;

GAENSSLEN, FH ;

YU, HN ;

RIDEOUT, VL ;

BASSOUS, E ;

LEBLANC, AR .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1974, SC 9 (05) :256-268

[5]

ELMANSY YA, P IEEE INT C CIRCUIT, V1, P457

[6] A 1-MU-M BIPOLAR VLSI TECHNOLOGY [J].

EVANS, SA ;

MORRIS, SA ;

ARLEDGE, LA ;

ENGLADE, JO ;

FULLER, CR .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 1980, 27 (08) :1373-1379

[7] FABRICATION OF INTEGRATED INJECTION LOGIC WITH ELECTRON-BEAM LITHOGRAPHY AND ION-IMPLANTATION [J].

EVANS, SA ;

BARTELT, JL ;

SLOAN, BJ ;

VARNELL, GL .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 1978, 25 (04) :402-407

[8]

HATZAKIS M, 1981, SOLID STATE TECHNOL, V24, P74

[9]

HATZAKIS M, 1979, SCANNING ELECTRON MI, V1, P275

[10]

Havemann R. H., 1981, International Electron Devices Meeting, P528

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