A GAAS DATA SWITCHING IC FOR A GIGABITS PER 2ND COMMUNICATION-SYSTEM

被引：10

作者：

NAKAYAMA, Y ^{[1
]}

OHTSUKA, T ^{[1
]}

SHIMIZU, H ^{[1
]}

YOKOGAWA, S ^{[1
]}

KAMEO, K ^{[1
]}

NISHI, H ^{[1
]}

机构：

[1] FUJITSU LABS LTD,KAWASAKI,KANAGAWA 211,JAPAN

来源：

IEEE JOURNAL OF SOLID-STATE CIRCUITS | 1986年 / 21卷 / 01期

关键词：

D O I：

10.1109/JSSC.1986.1052492

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

引用

页码：157 / 161

页数：5

共 13 条

[1]

AYASLI Y, 1982, MICROWAVE J, P61

[2]

AYASLI Y, 1983, 1983 GAAS IC S, P106

[3]

COOPER PD, 1984, 1984 GAAS IC S, P185

[4] GAAS INTEGRATED-CIRCUITS FOR ERROR-RATE MEASUREMENT IN HIGH-SPEED DIGITAL TRANSMISSION-SYSTEMS [J].

LIECHTI, CA ;

JOLY, R ;

NAMJOO, M .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1983, 18 (04) :402-408

[5]

LIECHTI CA, 1982, IEEE T ELECTRON DEV, V29, P1094

[6]

McLevige W. V., 1981, IEEE Transactions on Electron Devices, VED-28, P198, DOI 10.1109/T-ED.1981.20311

[7] A GAAS 16X16 BIT PARALLEL MULTIPLIER [J].

NAKAYAMA, Y ;

SUYAMA, K ;

SHIMIZU, H ;

YOKOYAMA, N ;

OHNISHI, H ;

SHIBATOMI, A ;

ISHIKAWA, H .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1983, 18 (05) :599-603

[8] A MONOLITHIC MULTIGIGABIT 2ND DCFL GAAS DECISION CIRCUIT [J].

OCONNOR, P ;

FLAHIVE, PG ;

CLEMETSON, W ;

PANOCK, RL ;

WEMPLE, SH ;

SHUNK, SC ;

TAKAHASHI, DP .

IEEE ELECTRON DEVICE LETTERS, 1984, 5 (07) :226-227

[9] HIGH-SPEED GAAS SCFL MONOLITHIC INTEGRATED DECISION CIRCUIT FOR GBIT/S OPTICAL REPEATERS [J].

OHTA, N ;

TAKADA, T .

ELECTRONICS LETTERS, 1983, 19 (23) :983-985

[10] PERFORMANCE OF HYBRID GAAS-MESFET LOGIC [J].

STARTIN, RA .

INTERNATIONAL JOURNAL OF ELECTRONICS, 1979, 46 (02) :161-165

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