PROJECTING GATE OXIDE RELIABILITY AND OPTIMIZING RELIABILITY SCREENS

被引：75

作者：

MOAZZAMI, R

HU, CM

机构：

[1] Department of Electrical and Computer Sciences, University of California, Berkeley

来源：

IEEE TRANSACTIONS ON ELECTRON DEVICES | 1990年 / 37卷 / 07期

关键词：

D O I：

10.1109/16.55751

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The effect of time-dependent stress voltage and temperature on the reliability of thin SiO, films is incorporated in a quantitative defect-induced breakdown model. Based on this model, design curves are presented which can be used along with a breakdown voltage distribution for an oxide technology to determine optimal burn-in conditions. The tradeoff between improved reliability and lower burn-in yield for different gate oxide technologies can also he examined quantitatively using the model presented here. © 1990 IEEE

引用

页码：1643 / 1650

页数：8

共 23 条

[1]

Baglee D. A., 1984, PROC IEEE INT REL PH, P152, DOI [10.1109/IRPS.1984.362035, DOI 10.1109/IRPS.1984.362035]

[2]

Chen I. C., 1986, International Electron Devices Meeting 1986. Technical Digest (Cat. No.86CH2381-2), P660

[3] HOLE TRAPPING AND BREAKDOWN IN THIN SIO2 [J].