A 16-MBIT DRAM WITH A RELAXED SENSE-AMPLIFIER-PITCH OPEN-BIT-LINE ARCHITECTURE

被引：14

作者：

INOUE, M

YAMADA, T

KOTANI, H

YAMAUCHI, H

FUJIWARA, A

MATSUSHIMA, J

AKAMATSU, H

FUKUMOTO, M

KUBOTA, M

NAKAO, I

AOI, N

FUSE, G

OGAWA, S

ODANAKA, S

UENO, A

YAMAMOTO, H

机构：

来源：

IEEE JOURNAL OF SOLID-STATE CIRCUITS | 1988年 / 23卷 / 05期

关键词：

D O I：

10.1109/4.5931

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

引用

页码：1104 / 1112

页数：9

共 18 条

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[8]

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