PLASMA-ETCHING OF ALUMINUM METALLIZATIONS FOR ULTRALARGE SCALE INTEGRATED-CIRCUITS

The metallizations which interconnect devices formed on silicon wafers have evolved from a single level of ''broad'' lines of aluminum to very narrow lines (< 1 mum in width), often more than two levels per chip. Whereas broad lines may be satisfactorily defined by solution or ''wet'' etching, narrow lines must be defined by plasma etching to maintain dimensional and profile control. Moreover, simple aluminum metallization has become complex, generally consisting of a composite of barrier and antireflecting layers which sandwich the aluminum film. In addition, the aluminum film itself is probably ''doped'' with silicon and copper for solid solubility and electromigration considerations. Consequently, plasma etching of ''aluminum'' has become more complicated in the last few years. In this article, the issues confronting the process engineer in attempting to implement reliable metal etching processes are reviewed, emphasizing metallization layers employed for very advanced complementary metal oxide semiconductor integrated circuits.