OPTIMIZATION OF SIMOX FOR VLSI BY ELECTRICAL CHARACTERIZATION

A comprehensive electrical characterization study was conducted to optimize the fabrication of SIMOX substrates for VLSI. The oxygen implantation was carried out using medium-current and high-current implanters and the wafers were annealed at 1275-degrees-C and 1300-degrees-C to produce high-quality, precipitate-free material. The sample selection was designed to study three main aspects of this technology: the effect of dose, the effect of multiple implantation (by sequentially implanting and annealing), and the effect of anneal ambient gas and capping layer during annealing. MOSFET's of various geometries and gate oxide of approximately 20 nm were fabricated by a CMOS process incorporating the addition of a thin epitaxial Si layer. A general evaluation of each transistor was conducted by studying its static I(D)(V(G), V(D)) characteristics. The interface states were evaluated by dynamic conductance, dynamic transconductance, and charge pumping; the bulk traps by current-DLTS; and carrier generation phenomena by generation-DLTS and the dual-gate Zerbst-like method. Good-quality interfaces were obtained, in particular by a relatively low oxygen dose (1.4 x 10(18) cm-2) and high-temperature annealing (greater-than-or-equal to 1275-degrees-C); better implantation control reduced contamination and supressed deep traps below the detection limit; and multiple implantation resulted in superior material quality, as evidenced by very long generation lifetime values (> 100-mu-s).